read-write-ddr

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DOUDIU / Video-Stitching-on-FPGA

This open-source repository aims to stitch several separate video streams into a single video using DDR3/4 storage via the AXI interface. The interface can be easily switched to the DDR3/4 located on either the PS or PL side using HP/GP ports or MIG IP.

real-time fpga video-stitching axi4 read-write-ddr

Updated Oct 28, 2024
Verilog

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