This repository contains a detailed description of a 10-bit potentiometric digital-to-analog converter. This work is carried out as a part of VSD Research Internship. The repository consists of all files required to design the PDAC. The pre-layout and post-layout simulations have also been provided with DNL and INL calculations.
This repository contains the details of simulation files of 10 bit SAR ADC.
CLI for ADC ramp-sweep analysis: DNL, INL, offset/gain errors, missing-code candidates, deterministic synthetic converters, and SVG reports
Cours de philosophie (niveau terminale) et d'HPL (premières). Cours de DNL (section euro Anglais / Philosophie) et formations en ligne (pédagogie, cinéma et numérique).
A local-first knowledge graph CLI, dual navigation language (DNL) for files and graph
This script is used to calculate the dnl and inl metrics of a DAC and evaluate if they are in range of +-1LSB. This is part of our VLSI Design Project with topic "R-2R 'Ladder' DAC" for the winter semester 2025-2026, AuTh.
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