-
Updated
Mar 4, 2024 - C++
#
basic-gates
Here are 4 public repositories matching this topic...
"Verilog_HDL" repository contains hardware description language (HDL) code written in Verilog for various digital logic and electronic designs."
-
Updated
Aug 29, 2023 - Verilog
This repository provides a comprehensive set of Verilog HDL implementations covering fundamental digital logic design.
fsm fpga verilog vivado digital-logic systemverilog hdl digital-design logic-design combinational-logic sequential-logic rtl-design hardware-design basic-gates
-
Updated
Dec 25, 2025 - Verilog
Logisim circuit files for CSE 2104 Digital Logic Design Sessional at RUET — covering gates, adders, decoders, multiplexer, flip-flops, counters, register and more, including extra circuits beyond the lab manual.
counter register encoder decoder multiplexer half-adder digital-logic-design full-adder flip-flops digital-logic-simulator ripple-carry-adder adder-subtractor digital-logic-design-lab priority-encoder basic-gates digital-logic-circuits
-
Updated
May 14, 2026
Add this topic to your repo
To associate your repository with the basic-gates topic, visit your repo's landing page and select "manage topics."