Conversation
Deploying xvec with
|
| Latest commit: |
bc87d5a
|
| Status: | ✅ Deploy successful! |
| Preview URL: | https://abae4c92.xvec.pages.dev |
| Branch Preview URL: | https://perf-vamana-memory.xvec.pages.dev |
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Vamana build, save, and reopen retained multiple copies of the same vectors and eagerly built fallback indexes. This change shares immutable vector storage and scalar codes, streams persistence, and reuses traversal scratch to lower process peak memory while preserving the file format and query/refinement behavior.
The persisted bytes remain compatible. Borrowed inputs must remain immutable; mutation uses copy-on-write. Save holds the read lock through persistence, so concurrent Add publication waits until Save finishes. No forced GC or GC tuning was added.
The complete benchmark uses Cohere
Performance768D100K(100,000 × 768), K=100, 1,000 serial queries, and 8 concurrent workers for 30 seconds. Environment: e2-standard-8 / AMD EPYC 7B12, Go 1.27.1,CGO_ENABLED=0,GOMAXPROCS=8,GOMEMLIMIT=24GiB, affinity 0–7. Vamana degree/build list/query list = 64/100/200, alpha=1.2, occlusion=750; INT4/INT8 rotation enabled, refinement disabled, mmap enabled. Each run uses a fresh collection. RSS is the entire process high-water mark measured bywait4, including loading, optimization, reopen, and queries; downloads and compilation are excluded.“Original” below is the historical xvec CSV at
6a8b120; “This PR” is the complete rerun on5d9b8f5plus the archived production patch586bbd53868e. zvec is the unchanged historicalv0.7.0+rotatemeasurement, not a new run.Compared with the original CSV, peak RSS falls by 49.1% / 52.1% / 60.3% / 30.1% for INT4 / INT8 / FP16 / FP32. Recall differs by at most 0.014 percentage points. Memory remains 1.9–2.8× the historical zvec values.
The measurements also show lower serial and concurrent QPS than the original xvec CSV in all four modes. Optimize is slower for INT4/INT8/FP32 and faster for FP16. These are single-run historical comparisons, and the original xvec revision predates other changes including SIMD kernels; they do not isolate this patch's effect. zvec has different recall, particularly for INT4, so these are not equal-recall comparisons. The CSV retains the full-run results, including regressions; separate diagnostics do not replace them.
Updated CSV, original CSV, analysis, and latest raw reports and provenance.
Validation completed before submission:
go test ./...and the additional Vamana snapshot/update isolation test passed.pnpm test(21 tests),pnpm check, andpnpm buildpassed. The build retains the existing large-chunk warning.