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[Deepin-Kernel-SIG] [linux 6.18.y] [Upstream] Update kernel base to 6.18.49-xe - #2157

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opsiff merged 3 commits into
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opsiff:linux-6.18.y-2026-09-17-backport
Sep 17, 2026
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opsiff merged 3 commits into
deepin-community:linux-6.18.yfrom
opsiff:linux-6.18.y-2026-09-17-backport

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@opsiff opsiff commented Sep 17, 2026

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#2152

Summary by Sourcery

Move GuC UM fault queues into a dedicated, DMA-contiguous buffer to improve reset handling and meet platform address requirements.

Bug Fixes:

  • Preserve GuC UM fault-ring descriptors across GT resets by moving UM queues into a dedicated buffer object.

Enhancements:

  • Ensure UM fault queues use contiguous DMA address space where required by GAM and initialize their GuC addresses from the dedicated allocation.

commit 99b0181 upstream.

Move the UM queues into a dedicated BO (ads->um_queue_bo) and avoid
CPU memset operations on it, which eliminates the CPU as a potential
cacheline-polluting agent and helps maintain consistency between GAM
writes and GuC reads.

We also need to ensure the base_dpa for the queue is contiguous on hw
where this is used instead of a GGTT address. Another good reason to
split this out to a separate BO.

Fixes: 9c57bc0 ("drm/xe/lnl: Drop force_probe requirement")
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: <stable@vger.kernel.org> # v6.12+
Signed-off-by: Jia Yao <jia.yao@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patch.msgid.link/20260804165057.129529-2-jia.yao@intel.com
(cherry picked from commit 99b0181)
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
(cherry picked from commit af2d3f6f29b07a2519a437ac3cb044d2619205a7)
Signed-off-by: Wentao Guan <guanwentao@uniontech.com>
commit f342810 upstream.

On iGPU, the UM queue BO is allocated in system memory. On dGFX, the BO
was previously created in system memory and later reallocated in
xe_guc_realloc_post_hwconfig().  Allocate the UM queue BO directly in
VRAM on dGFX, where it is ultimately required.

Fixes: 9c57bc0 ("drm/xe/lnl: Drop force_probe requirement")
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: <stable@vger.kernel.org> # v6.12+
Signed-off-by: Jia Yao <jia.yao@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patch.msgid.link/20260804165057.129529-3-jia.yao@intel.com
(cherry picked from commit f342810)
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
(cherry picked from commit a65b52f6cdc92acefa0a496499cad02a87275757)
Signed-off-by: Wentao Guan <guanwentao@uniontech.com>
commit 8d5134a upstream.

On Pre-Xe3p platform, the GAM write the UM queue through DPA using UC.
if GuC reads the queue via GGTT (WB), stale data may be observed
when the cacheline has been polluted by another agent.

To match the GAM's UC writes, configure the GuC mapping as UC as well.

Fixes: 9c57bc0 ("drm/xe/lnl: Drop force_probe requirement")
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: <stable@vger.kernel.org> # v6.12+
Signed-off-by: Jia Yao <jia.yao@intel.com>
Reviewed by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patch.msgid.link/20260804165057.129529-4-jia.yao@intel.com
(cherry picked from commit 8d5134a)
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
(cherry picked from commit 8be5f23ae94902814a147adcb58669ebe4c65012)
Signed-off-by: Wentao Guan <guanwentao@uniontech.com>
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sourcery-ai Bot commented Sep 17, 2026

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Reviewer's Guide

The PR updates the XE GuC ADS memory layout by allocating USM fault queues in a dedicated pinned buffer, preserving queue descriptors across GT resets and ensuring GAM-required DMA contiguity. It adds BO scatter-gather validation and adjusts queue base programming and ADS sizing accordingly.

File-Level Changes

Change Details Files
Move GuC UM fault queues into a dedicated pinned BO and validate required DMA contiguity.
  • Add a separate USM queue allocation, using power-of-two sizing on iGPU systems to improve physical contiguity and VRAM allocation on dGPU systems.
  • Reject non-contiguous system-memory allocations on platforms where GAM requires contiguous DPA.
  • Track the dedicated BO separately and program GGTT/DPA queue bases from it instead of embedding queues in the ADS BO.
  • Update ADS layout and initialization sizing/offset calculations to remove UM queues from the main ADS allocation.
drivers/gpu/drm/xe/xe_guc_ads.c
drivers/gpu/drm/xe/xe_guc_ads_types.h
Add a reusable scatter-gather contiguity check for XE buffer objects.
  • Include DRM PRIME helpers and expose an inline check for whether the first requested byte range has contiguous DMA addresses.
drivers/gpu/drm/xe/xe_bo.h

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[APPROVALNOTIFIER] This PR is NOT APPROVED

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Hey - I've reviewed your changes and they look great!


Sourcery is free for open source - if you like our reviews please consider sharing them ✨

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🟢 Approval recommended

The changes consistently apply the referenced upstream fixes without identified regressions.

Pull request overview

Moves GuC UM fault queues into a dedicated contiguous, uncached BO to preserve descriptors across GT resets.

Changes:

  • Allocates UM queues separately, using VRAM on dGFX.
  • Validates DMA-address contiguity for system memory.
  • Initializes GuC queue addresses from the new BO.
File summaries
File Description
drivers/gpu/drm/xe/xe_guc_ads.c Implements dedicated UM queue allocation and addressing.
drivers/gpu/drm/xe/xe_guc_ads_types.h Tracks the dedicated UM queue BO.
drivers/gpu/drm/xe/xe_bo.h Adds a DMA-contiguity helper.
Review details
  • Files reviewed: 3/3 changed files
  • Comments generated: 0
  • Review effort level: Balanced

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@opsiff
opsiff merged commit cafb270 into deepin-community:linux-6.18.y Sep 17, 2026
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4 participants