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1. autowire autowire Public

   Verilog自动连线工具，适用于soc集成

   Python 6 3

2. dma_controller dma_controller Public

   This project is an AXI-based DMA (Direct Memory Access) controller

   Verilog 1

3. verilog_reg_auto_gen verilog_reg_auto_gen Public

   Python 1

4. cordic-fft cordic-fft Public

   fft implemented by cordic algorithm (4-16384 point)

   Verilog 9

5. crc-verilog-gen crc-verilog-gen Public

   crc verilog generator by Python script

   Python 4 3

6. cordic-dds cordic-dds Public

   dds implemented by cordic algorithm

   Verilog 2 1