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VRM21-Studios/README.md

Hi there, I'm Ryadh ๐Ÿ‘‹

Welcome to VRM21 Studios โ€” Versatile Reconfigurable Modules

Vision, Rรชve, Magie โœจ

I am an Electrical Engineering graduate specializing in Digital IC Design, RTL Engineering, and Hardware-Software Co-Design. I am passionate about bridging the gap between low-level hardware architecture and high-level software control.

The VRM21-Studios repositories collectively document a self-directed exploration of digital hardware, ranging from fundamental DSP building blocks and data transformations to processor architectures and AI accelerators.

The goal is not simply to reproduce existing algorithms in RTL, but to understand how mathematical and computational concepts are translated into practical hardware architectures, and how architectural decisions affect resource utilization, throughput, numerical behavior, and system integration.

๐Ÿ› ๏ธ Core Focus

  • Digital IC & RTL Design: Writing highly optimized, reusable Verilog for FPGAs.
  • Computer Architecture: Custom RV32I RISC-V cores and AXI4/AXI-Stream interfaces.
  • Hardware Acceleration: High-performance Audio DSP pipelines (QMF, FIR/IIR filters, Spatial Audio, Spectral Processing) and AI architectures, including Spiking Neural Networks (SNNs) and Systolic Arrays.
  • HW/SW Co-Design: Utilizing Xilinx Vivado, Vitis, and the Python PYNQ framework for seamless IP control across platforms such as Zynq UltraScale+, Kria KV260, and KR260.

๐Ÿ“ˆ Highlighted Expertise

My capstone and independent research heavily involve Xilinx adaptive SoCs. I have architected the VRM Series SoCโ€”a system utilizing a custom RISC-V CPU to orchestrate complex DSP hardware accelerators.

True to its origins in Voix, Rythme, Musique, my pinned repositories feature reference RTL implementations of various audio DSP nodes. These modules are designed with maximum flexibility in mind, ready to be reconfigured for diverse applications.

๐ŸŒฑ Current Endeavors

  • Expanding my knowledge footprint into Data Science and Machine Learning to further complement custom hardware AI accelerators.
  • Preparing and structuring robust RTL architectures for academic research and manuscript publications.

๐ŸŒ VRM21 Studios Workspace

The broader VRM21 Studios workspace and portfolio are available at:

VRM21 Studios | Ryadh Al Ariz

The website serves as a central entry point for selected technical documentation, development notes, and other resources associated with the VRM21 Studios ecosystem.

๐Ÿ“ซ Reach me at: LinkedIn | Email | ORCID: 0009-0000-2759-2235 | ResearchGate

Pinned Loading

  1. VRM21-NPU-Series VRM21-NPU-Series Public

    A collection of FPGA-oriented AI accelerator RTL designs, including an 8x8 weight-stationary systolic array and a parameterized event-driven SNN/LIF accelerator, targeting the AMD Kria KV260.

    SystemVerilog 2

  2. FIR-Module-FPGA FIR-Module-FPGA Public

    A FIR filter for 16-bit stereo PCM audio DSP implemented on an FPGA with fixed-point representation.

    Verilog 2 1

  3. IIR-Biquad-Module-FPGA IIR-Biquad-Module-FPGA Public

    Reference RTL implementation of a fixed-point IIR biquad filter with AXI-Stream and AXI-Lite control, validated on FPGA hardware.

    Verilog 1

  4. Quadrature-Mirror-Filter-Module-FPGA Quadrature-Mirror-Filter-Module-FPGA Public

    RTL reference implementation of a QMF analysis/synthesis filter bank using AXI-Stream, focused on fixed-point DSP and hardware correctness.

    Verilog 1

  5. VRM21-DWT-Module-FPGA VRM21-DWT-Module-FPGA Public

    RTL implementation of a configurable single-stage DWT and IDWT accelerator with AXI4-Stream, AXI4-Lite coefficient reconfiguration, fixed-point Q15 processing, and support for software-controlled mโ€ฆ

    Verilog 1

  6. VRM21-RTL-Utilities VRM21-RTL-Utilities Public

    This repository contains basic modules that will be frequently used in other repositories on VRM21-Studios

    Verilog 1 1