Some older boards either don't implement std::atomic at all or only partially. In these cases we need a best efforts implementation that gets as close to the function of CAS and atomic load/store as possible. This should cover nearly all boards that don't fully implement CAS as lock free, in a safe way.
Most ARM Cortex processors that don't support CAS.
Most RISCV processors that don't support CAS.
AVR processors
ESP8266
Some older boards either don't implement std::atomic at all or only partially. In these cases we need a best efforts implementation that gets as close to the function of CAS and atomic load/store as possible. This should cover nearly all boards that don't fully implement CAS as lock free, in a safe way.
Most ARM Cortex processors that don't support CAS.
Most RISCV processors that don't support CAS.
AVR processors
ESP8266