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docs(H7): address Copilot review on PLATFORM_H7 + TODO H7 items - #148
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Follow-up to #146: - State the VS1 fragment budget as the full TileDeltaFrame (<=203 B FHSS, <=243 B DTS, 6 B header + <=197/237 B body), not the body alone. - Fix the M7 throughput estimate: 32-83 ms x 5-15 gives ~0.16-1.25 s per frame (~0.8-6 fps) for the encode alone, before capture and pre-stage. - The L072 TX ring is pure FIFO; HOST_TXQ_P0_RESERVED is dead (RS-10.12), so the scheduler must keep non-P0 frames to HOST_TXQ_DEPTH-1 slots. - Stamp capture_ms from the camera's own capture tick via an offset learned from each request, not from the request time. - Point the VS1 port at the golden vectors in test_vector_codec.py; test_vs1_codec_parity_sil.py only checks the two Python copies match. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01JRs8sJLC6JbYLsSGM79Xcw
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🟡 Changes recommended
The host-side ring limit still overstates P0 availability and cannot enforce the documented strict-priority contract.
2 open findings
What changed in this PR
Updates the H7-only platform documentation to correct VS1 sizing, performance estimates, queue behavior, capture timestamps, and codec validation guidance.
Changes:
- Corrects VS1 fragment budgets and M7 throughput estimates.
- Documents FIFO queue limits and camera-clock timestamp mapping.
- Points H7 codec validation to independent golden vectors.
| File | Description |
|---|---|
TODO.md |
Refines H7 scheduler, camera protocol, and codec-port tasks. |
PLATFORM_H7.md |
Corrects H7 video and scheduling design details. |
🧠 Review effort: Balanced
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Follow-up to Copilot review on #148. The L072 TX ring is FIFO (host_cmd.c appends at the tail and drains from the head), so a host-side occupancy limit cannot make P0 strict: a P0 still waits behind parked image frames, and a second P0 could find the ring full. PLATFORM_H7.md §6 rule 2 and TODO H7-7 now describe an explicitly bounded, non-strict policy until RS-10.12/F5 adds a firmware control lane: at most 3 non-P0 frames in flight at the L072, at most one P0 parked (a newer P0 waits latest-wins in the M7 mailbox), so a P0 submit never hits QUEUE_FULL and its wait stays within config.h's ~560 ms FHSS / 390 ms DTS figures, inside the 700 ms P0 budget. H7-7 now asks for a SIL model of the FIFO ring that asserts the worst-case P0 wait. The summary table and §6 intro carry the caveat. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01JRs8sJLC6JbYLsSGM79Xcw
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Requested by Dorkmo · project thread
Before: PLATFORM_H7.md (merged in #146) understated the VS1 fragment size, gave an M7 frame-rate estimate that didn't follow from its own numbers, said the L072 ring reserves a P0 slot (it doesn't), stamped camera frames with the request time, and the TODO pointed the VS1 port at a test with no golden vectors.
After: all four Copilot findings on #146 are fixed, plus the timestamp gap from its summary.
TileDeltaFrame: ≤203 B at FHSS or ≤243 B at DTS (6 B header plus a ≤197/237 B VS1 body), per VECTOR_SCENE.md §3.1.HOST_TXQ_P0_RESERVEDis dead (SETTINGS_REFERENCE.md, RS-10.12), so the scheduler design and TODO H7-7 now require non-P0 frames to use at mostHOST_TXQ_DEPTH − 1slots.capture_mscomes from the camera's own capture tick through an offset learned from each request, not from the request time (H7-8).test_vector_codec.py;test_vs1_codec_parity_sil.pyonly checks that the two Python copies are identical.How: docs only. The doc-reading SIL tests pass locally.
Refs #141, follow-up to #146
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https://claude.ai/code/session_01JRs8sJLC6JbYLsSGM79Xcw
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