Blog post: a 1.7× faster HPL on a RISC-V SiFive U74 via EESSI

[hmeiland]

New blog post: a 1.7× faster HPL on a RISC-V SiFive U74 via EESSI

Adds a walkthrough that gets a ~1.7× faster HPL on a StarFive VisionFive 2 (SiFive U74,
rv64gc) end-to-end through EESSI — no hand-built BLAS, no patched HPL:

• set up CVMFS + EESSI on riscv64 (using the dev.eessi.io/riscv stack),
• measure a baseline HPL with the stock stack (~3.1 GFLOP/s),
• build a U74-tuned OpenBLAS straight from an easyconfigs PR with eb --from-pr,
• swap it in at runtime via FlexiBLAS and re-run the same HPL (~5.3 GFLOP/s).

Files

• docs/blog/posts/2026/07/risc-v-u74-openblas-hpl.md — the post
• docs/blog/.authors.yml — new author entry hmeiland (Hugo Meiland, Microsoft)

Notes

• Reproduced end-to-end on real VisionFive 2 hardware with EESSI 2025.06-001.
• The underlying kernel/packaging work is upstream in Add SiFive U74 target with a scalar 4×4 register-tiled GEMM kernel OpenMathLib/OpenBLAS#5903 and
  OpenBLAS-0.3.30-GCC-14.3.0-U74.eb (SiFive U74 / RVA20 target) easybuilders/easybuild-easyconfigs#26436.
• The post carries an AI-assistance disclosure per the EasyBuild AI policy.
• TOC is hidden for this post via hide: [toc] in the front matter.

[satishskamath]

@hmeiland May be mentioning the raw core performance is also fruitful here to see how much of R_peak per core can HPL actually achieve.

[satishskamath]

@hmeiland update on the previous query?