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amiga kernel: restore INTENA's master bit when leaving a Paula interrupt - #158

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WDrijver merged 1 commit into
ApolloTeam-dev:masterfrom
Kamelitoloveless:restore-INTENA-master-bit-when-leaving-Paula-int
Oct 10, 2026
Merged

WDrijver merged 1 commit into
ApolloTeam-dev:masterfrom
Kamelitoloveless:restore-INTENA-master-bit-when-leaving-Paula-int

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@Kamelitoloveless

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A program may hold a Disable() and still turn the hardware interrupts back on itself (Speedway Manager cracktro: Disable(), INTENA=$C020, AddIntServer(VERTB), spin on the server's counter). Our VERTB servers take Disable()/Enable() sections (timer.device's vblank handler, the graphics VBlank server), and with the interrupted task's IDNestCnt at 0 their Enable() never writes $C000 again, so the first vertical blank silently cleared INTEN and the program froze (issue #742). Kickstart's Enable() behaves the same, but its VERTB servers never do this.

Interrupt handling must be transparent to the interrupted code: the master bit was set or the interrupt could not have happened, so set it again on the way out of the level 1-6 handlers.

A program may hold a Disable() and still turn the hardware interrupts
back on itself (Speedway Manager cracktro: Disable(), INTENA=$C020,
AddIntServer(VERTB), spin on the server's counter). Our VERTB servers
take Disable()/Enable() sections (timer.device's vblank handler, the
graphics VBlank server), and with the interrupted task's IDNestCnt at 0
their Enable() never writes $C000 again, so the first vertical blank
silently cleared INTEN and the program froze (issue #742). Kickstart's
Enable() behaves the same, but its VERTB servers never do this.

Interrupt handling must be transparent to the interrupted code: the
master bit was set or the interrupt could not have happened, so set it
again on the way out of the level 1-6 handlers.
@Kamelitoloveless

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This fixed all the demos having issues for OCS and AGA that come with ApolloOS.

@WDrijver
WDrijver merged commit 6230dc2 into ApolloTeam-dev:master Oct 10, 2026
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3 participants